115 lines
2.7 KiB
C
115 lines
2.7 KiB
C
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/*
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*Copyright (C),2023 , NANOCHAP
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*File name: ENS1_ADC.H
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*Author:
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*Version: V1.0
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*Date: 2023-11-
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*Description:
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*Function List:
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History:
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1.V1.0
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Date:
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Author:
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Modification: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*/
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#ifndef ENS1_ADC_H
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#define ENS1_ADC_H
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#include "my_header.h"
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/*
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GPIO21 --- ADC 1
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GPIO22 --- ADC 2
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GPIO23 --- ADC 3
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*/
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extern uint16_t save_data;
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extern uint8_t ADC_UART_BYTE_LOW ;
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extern uint8_t ADC_UART_BYTE_HIGH ;
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typedef enum { ENS1_PGA_TO_ADC = 0 ,ENS1_ADC_CHANNEL1 = 1,ENS1_ADC_CHANNEL2 = 2,ENS1_ADC_CHANNEL3 = 3}ENS_ADC_SEL;
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//typedef enum { SINGLE_ADC_MODE = 0, CONTINUOUS_ADC_MODE = 1}ENS_ADC_COV_MODE;
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//typedef enum { NOOVERRUN_ADC_MODE = 0, OVERRUN_ADC_MODE = 1}ENS_ADC_OVERRUN_MODE;
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//typedef enum { NOWAIT_ADC_MODE = 0, WAIT_ADC_MODE = 1}WAIT_MODE;
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typedef enum { NCOV_WITHOUT_RCV_EOC = 0 , COV_RCV_EOC = 1}ENS_ADC_COV_INC_EOC;
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/*ģʽ<C4A3><CABD><EFBFBD>ࣺ MODE_SEL
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<EFBFBD><EFBFBD><EFBFBD>βɼ<EFBFBD>
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD>
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OVERRUN
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<EFBFBD>ر<EFBFBD>OVERRUN
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<EFBFBD>ȴ<EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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<EFBFBD>ȴ<EFBFBD>ģʽ<EFBFBD>ر<EFBFBD>
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*/
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#define SINGLE_ADC_MODE 0
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#define CONTINUOUS_ADC_MODE (1)
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#define OVERRUN_ADC_MODE (1<<1)
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#define WAIT_ADC_MODE (1<<2)
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/*<2A>ж<EFBFBD>ģʽѡ<CABD><D1A1> INT_MODE_SEL */
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#define DISABLE_INT (0)
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#define ENABLE_EOC_INT (1)
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#define ENABLE_OVERRUN_INT (1<<1)
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/*
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ADC<EFBFBD><EFBFBD>ȡ״̬
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*/
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#define ADC_READ_DATA_IS_WAITING 0x00
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#define ADC_READ_DATA_IS_READY 0x01
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/*
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SIMLING_TIME
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*/
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#define ADC_SampleTime_2ADC_Clk ((uint8_t)0x00)
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#define ADC_SampleTime_3ADC_Clk ((uint8_t)0x01)
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#define ADC_SampleTime_4ADC_Clk ((uint8_t)0x02)
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#define ADC_SampleTime_5ADC_Clk ((uint8_t)0x03)
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/*
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*/
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#define ADC_CLK_base2div ((uint8_t)0x00)
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#define ADC_CLK_base4div ((uint8_t)0x01)
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#define ADC_CLK_base6div ((uint8_t)0x02)
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#define ADC_CLK_base8div ((uint8_t)0x03)
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#define ADC_CLK_base10div ((uint8_t)0x04)
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#define ADC_CLK_base12div ((uint8_t)0x05)
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#define ADC_CLK_base16div ((uint8_t)0x06)
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#define ADC_CLK_base32div ((uint8_t)0x07)
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/*
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*/
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#define single_mode_without_overrun_without_wait 0
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#define single_mode_without_overrun_with_wait 4
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#define single_mode_with_overrun_without_wait 2
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#define single_mode_with_overrun_with_wait 6
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#define continious_mode_without_overrun_without_wait 1
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#define continious_mode_with_overrun_without_wait 3
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#define Continious_mode_without_overun_with_wait 5
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#define continious_mode_with_overrun_with_wait 7
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/*
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADC<EFBFBD><EFBFBD><EFBFBD>غ<EFBFBD><EFBFBD><EFBFBD>
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*/
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extern uint8_t ENS1_ADCCLKConfig(uint8_t ADC_CLK_div);
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extern uint8_t ENS1_ADC_CONFIG(ENS_ADC_SEL channelx ,
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uint8_t MODE_SEL,
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ENS_ADC_COV_INC_EOC EOC_CONFIG ,
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uint8_t SIMLING_TIME,
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uint8_t INT_MODE_SEL);
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extern uint8_t ENS1_ADC_START(ENS_ADC_SEL channelx);
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extern uint8_t ENS1_ADC_STOP(ENS_ADC_SEL channelx);
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extern uint16_t ADC_READ_DATA(void);
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#endif
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