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Electricity/FWLIB/source/ENS_ADC.c

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第一次上传 矫正timer 实现GPIO19灯珠闪烁 尚未移植电刺激
2025-08-13 16:43:29 +08:00
/*
*Copyright (C),2023 , NANOCHAP
*File name: ENS1_ADC.C
*Author:
*Version: V1.0
*Date: 2023-11-
*Description:
*Function List:
History:
1.V1.0
Date:
Author:
Modification: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
#include "ENS1_ADC.h"
#include "ENS1_GPIO.h"
#include "ENS1_CLOCK.h"
#include "ENS1_ANAC.h"
/* һ<><D2BB><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>˵<EFBFBD><CBB5><EFBFBD><EFBFBD>
ADC<EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD>ת<EFBFBD><EFBFBD>ģʽ <EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD><EFBFBD><EFBFBD>ģʽ <EFBFBD>ȴ<EFBFBD>ģʽ
ADC<EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD> ADCʹ<EFBFBD><EFBFBD> <EFBFBD><EFBFBD> ADC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
ADC<EFBFBD>ж<EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD> EOC<EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD>
ADC<EFBFBD>ж<EFBFBD>״̬<EFBFBD><EFBFBD> EOC<EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϷ<EFBFBD><EFBFBD><EFBFBD>
ADC״̬ <EFBFBD><EFBFBD> EOC<EFBFBD><EFBFBD>־ ADC<EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><EFBFBD><EFBFBD>æ״̬
ADCʱ<EFBFBD>ӷ<EFBFBD>Ƶ <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶֵ 2 4 6 8 10 12 16 32
ADC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD> <EFBFBD><EFBFBD>ADC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2 3 4 5
ADC<EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>
ADCͨ<EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD> <EFBFBD><EFBFBD>
ADCEOC<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD> <EFBFBD><EFBFBD> <EFBFBD>Ƿ<EFBFBD><EFBFBD>ڽ<EFBFBD><EFBFBD>յ<EFBFBD>EOC<EFBFBD><EFBFBD>־<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>´<EFBFBD>ת<EFBFBD><EFBFBD>
*/
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>ģʽ
*ADC<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD>ADC_START λ<EFBFBD><EFBFBD>0 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD>EOC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>EOC_WAIT_COUNT_DONE <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><EFBFBD><EFBFBD>
*<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD><EFBFBD>EOC_WAIT_COUNT_DONE <EFBFBD><EFBFBD>û<EFBFBD>н<EFBFBD><EFBFBD>յ<EFBFBD>EOC <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ᱻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*ADC<EFBFBD><EFBFBD>ֹͣת<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADC_CTRL_REG <EFBFBD><EFBFBD> ADC_EN λ Ϊ1
*<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD>ڼ䣬ADC_EN λ<EFBFBD><EFBFBD>Ϊ0 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڽ<EFBFBD><EFBFBD>е<EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> EOC/EOC_WAIT_COUNT_DONE ֹͣת<EFBFBD><EFBFBD>
*<EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><EFBFBD><EFBFBD>EOC <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
ADC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̣<EFBFBD>
1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>޵ȴ<EFBFBD>ģʽ<EFBFBD><EFBFBD>
2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADC_CONFIG_reg bit0 = 0 bit2 = 0
3<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
4<EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADC_Data register
5<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>ADC_EOC_IE<EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD>
6<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> IER<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> EOC_INT_EN <EFBFBD><EFBFBD>OVER_RUN_INT_EN λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϵͳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
7<EFBFBD><EFBFBD>Ӳ<EFBFBD><EFBFBD>ֹͣADC
*/
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>ģʽ
1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADC_CONFIG_reg bit0 = 1
2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD>1 ADC_EN bit and ADC_START bits
3<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֮<EFBFBD>󣬻<EFBFBD><EFBFBD><EFBFBD>adc_eoc_config_regsiter[0] <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>´<EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Adc_eoc_config_register[0] =1 <EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD>EOC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD>´<EFBFBD>ת<EFBFBD><EFBFBD>
<EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><EFBFBD>浽<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
4<EFBFBD><EFBFBD>ADC_EOC_IE <EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
5<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> IER<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> EOC_INT_EN <EFBFBD><EFBFBD>OVER_RUN_INT_EN λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϵͳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
ע<EFBFBD>⣺ADC_eoc_config_reg<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>-<EFBFBD>ǵȴ<EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч <EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>EOC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD>
1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD>EOC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD>
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>-<EFBFBD>ȴ<EFBFBD>ģʽ<EFBFBD>£<EFBFBD>ADC_eoc_config_regӦ<EFBFBD>ñ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ0 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
/*<2A>ġ<EFBFBD><C4A1>ȴ<EFBFBD>ģʽ
1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADC_CONFIG_reg bit2 = 1 <EFBFBD><EFBFBD>ʹ<EFBFBD>ܵȴ<EFBFBD>ģʽ<EFBFBD><EFBFBD>
2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD>
3<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><EFBFBD><EFBFBD>
<EFBFBD><EFBFBD>ADC<EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
ADC_EOC_IE <EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> IER<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> EOC_INT_EN <EFBFBD><EFBFBD>OVER_RUN_INT_EN λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϵͳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
4<EFBFBD><EFBFBD>ADC<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>뵽ADC_WAIT <EFBFBD>ȴ<EFBFBD>״ֱ̬<EFBFBD><EFBFBD>EOC<EFBFBD>жϱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADC<EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD>ϵͳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
5<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>EOC<EFBFBD>жϱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADC<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>һ<EFBFBD>ε<EFBFBD>ת<EFBFBD><EFBFBD>
*/
/*<2A>塢<EFBFBD><E5A1A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADC<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD>EOC<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> OVERRUNģʽ<EFBFBD><EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD><EFBFBD>µ<EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><EFBFBD>ᱻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD> overrun <EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
ע<EFBFBD>⣺ <EFBFBD><EFBFBD><EFBFBD><EFBFBD>overrun ģʽû<EFBFBD>б<EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD> <EFBFBD>µĻ<EFBFBD><EFBFBD>߾ɵ<EFBFBD>ת<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>overrun <EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ѡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD>overrun <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ᱻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
<EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><EFBFBD>overrun <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>˵<EFBFBD><CBB5>
1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD>EOC<EFBFBD><EFBFBD> EOC_IR <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
2<EFBFBD><EFBFBD>OVERRUN<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>OVERRUN_IR <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
3<EFBFBD><EFBFBD>EOC_IR <EFBFBD><EFBFBD>overrun <EFBFBD><EFBFBD>ΪADC<EFBFBD>жϱ<EFBFBD> ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϵͳ
<EFBFBD><EFBFBD>ϵͳͨ<EFBFBD><EFBFBD> data_reg <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>adc<EFBFBD><EFBFBD><EFBFBD>ݺ<EFBFBD><EFBFBD><EFBFBD> EOC_IR <EFBFBD><EFBFBD> EOC_IR_CLEAR <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
/*overrun <20><><EFBFBD><EFBFBD>
<EFBFBD>˴<EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD><EFBFBD>ǣ<EFBFBD> ADC<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϵͳ<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>ADC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>EOC_IRǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><EFBFBD>µ<EFBFBD>EOC
*/
volatile uint8_t ADC_READ_STATUS = ADC_READ_DATA_IS_WAITING;
uint8_t ADC_UART_BYTE_LOW = 0;
uint8_t ADC_UART_BYTE_HIGH = 0;
uint8_t ENS1_ADCCLKConfig(uint8_t ADC_CLK_div)
{
CMSDK_ADC->ADC_CLK_DIV = ((CMSDK_ADC->ADC_CLK_DIV &~ (0x7)) | (ADC_CLK_div));
return 0;
}
/*
ENS_ADC_COV_MODE COV_MODE
ENS_ADC_OVERRUN_MODE OVERRUN_MODE
WAIT_MODE WAITorNOT
*/
uint8_t ENS1_ADC_CONFIG(ENS_ADC_SEL channelx ,
uint8_t MODE_SEL,
ENS_ADC_COV_INC_EOC EOC_CONFIG ,
uint8_t SIMLING_TIME,
uint8_t INT_MODE_SEL)
{
NVIC_ClearPendingIRQ(ADC_IRQn);
NVIC_DisableIRQ(ADC_IRQn);
if(channelx == ENS1_ADC_CHANNEL1)
{
CMSDK_GPIO->ALTFH = (CMSDK_GPIO->ALTFH &~ (0x03<<10))|(0x03<<10);
CMSDK_GPIO->ANAEN |= (1 << 21);
CMSDK_ADC->ADC_CH_SEL &=~ (0x7);
CMSDK_ADC->ADC_CH_SEL = 1;
}
else if(channelx == ENS1_ADC_CHANNEL2)
{
CMSDK_GPIO->ALTFH = (CMSDK_GPIO->ALTFH &~ (0x03<<12))|(0x03<<12);
CMSDK_GPIO->ANAEN |= (1 << 22);
CMSDK_ADC->ADC_CH_SEL &=~ (0x7);
CMSDK_ADC->ADC_CH_SEL = 2;
}
else if(channelx == ENS1_ADC_CHANNEL3)
{
CMSDK_GPIO->ALTFH = (CMSDK_GPIO->ALTFH &~ (0x03<<14))|(0x03<<14);
CMSDK_GPIO->ANAEN |= (1 << 23);
CMSDK_ADC->ADC_CH_SEL &=~ (0x7);
CMSDK_ADC->ADC_CH_SEL = 3;
}
else
{
CMSDK_ADC->ADC_CH_SEL &=~ (0x7);
CMSDK_ADC->ADC_CH_SEL = 0;
}
CMSDK_ADC->ADC_CONFG =(CMSDK_ADC->ADC_CONFG &~ 0x7 )| MODE_SEL;
CMSDK_ADC->ADC_SAMP_TIME = (CMSDK_ADC->ADC_SAMP_TIME &~ 0x3) | SIMLING_TIME;
//<2F><><EFBFBD><EFBFBD>ADC_eoc_config_reg<65>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>-<2D>ǵȴ<C7B5>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7>
if( ((MODE_SEL & 0X1 )== 1 ) && (MODE_SEL & 0X4) == 0)
{
CMSDK_ADC->ADC_EOC_CONFG = (CMSDK_ADC->ADC_EOC_CONFG &~ (0x1)) | EOC_CONFIG;
}
//<2F>ж<EFBFBD>ʹ<EFBFBD><CAB9>
CMSDK_ADC->ADC_IER = (CMSDK_ADC->ADC_IER &~ (0x3)) | ( INT_MODE_SEL );
return CMSDK_ADC->ADC_CONFG;
}
uint8_t ENS1_ADC_START(ENS_ADC_SEL channelx )
{
CMSDK_ADC->ADC_CTRL |= (1) |(1<<8);
if(CMSDK_ADC->ADC_IER != 0)
{
NVIC_EnableIRQ(ADC_IRQn);
}
return 0;
}
uint8_t ENS1_ADC_STOP(ENS_ADC_SEL channelx)
{
CMSDK_ADC->ADC_CTRL &=~ (1);
NVIC_DisableIRQ(ADC_IRQn);
return 0;
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
//ADC<44>ڲ<EFBFBD>ͬģʽ<C4A3><CABD><EFBFBD>в<EFBFBD>ͬ<EFBFBD>IJɼ<C4B2><C9BC><EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Adc_config_register<65><72><EFBFBD><EFBFBD><EFBFBD>ò<EFBFBD>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD>8<EFBFBD><38>ģʽ
uint16_t save_data;
uint8_t ADC_CONFIG_READ;
//<2F>˺<EFBFBD><CBBA><EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ɣ<EFBFBD><C9A3><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD>+<2B>ж<EFBFBD>ģʽ<C4A3><CABD><EFBFBD>˺<EFBFBD><CBBA><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ò<EFBFBD><C3B2><EFBFBD>
uint16_t ADC_READ_DATA(void)
{
ADC_CONFIG_READ = CMSDK_ADC->ADC_CONFG;
switch(ADC_CONFIG_READ & 0x7) {
case single_mode_without_overrun_without_wait :
while(ADC_READ_STATUS == ADC_READ_DATA_IS_WAITING); //<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>EOC<4F>ĵ<EFBFBD><C4B5><EFBFBD>
ADC_READ_STATUS = ADC_READ_DATA_IS_WAITING; //<2F>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD>ADC<44><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˣ<EFBFBD><CBA3><EFBFBD>ʱ<EFBFBD>ٽ<EFBFBD>״̬<D7B4>л<EFBFBD><D0BB><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
break;
case continious_mode_without_overrun_without_wait :
break;
case single_mode_with_overrun_without_wait :
break;
case continious_mode_with_overrun_without_wait :
break;
case single_mode_without_overrun_with_wait :
break;
case Continious_mode_without_overun_with_wait :
break;
case single_mode_with_overrun_with_wait :
break;
case continious_mode_with_overrun_with_wait :
break;
}
return (uint16_t)save_data;
}
//ADC interrupt handler
void ADC_Handler(void) __irq
{
if((CMSDK_ADC->ADC_ISR & 0x01) == 0x01) //<2F><><EFBFBD>յ<EFBFBD>EOC
{
CMSDK_ADC->ADC_INT_CLR = (0x01<<0);
ADC_READ_STATUS = ADC_READ_DATA_IS_READY;
save_data = (CMSDK_ADC->ADC_DATA & 0x0fff); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݺ󣬿<DDBA><F3A3ACBF>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD>βɼ<CEB2>
printf("%d\n",save_data);
ADC_UART_BYTE_LOW = save_data&0xff;
ADC_UART_BYTE_HIGH = (save_data&0x0f00)>>8;
}
if(((CMSDK_ADC->ADC_ISR & 0x02)>>1) == 0x01) //overrun error
{
CMSDK_ADC->ADC_INT_CLR = (0x01<<1);
}
}