379 lines
9.1 KiB
C
379 lines
9.1 KiB
C
/*
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*Copyright ,2023 , NANOCHAP
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*File name: ENS1_SPI.C
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*Author:
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*Version: V1.0
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*Date: 2023-11-
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*Description:
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*Function List:
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History:
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1.V1.0
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Date:
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Author:
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Modification: 2023-11-15
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*/
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#include "ENS1_SPI.h"
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#include "ENS1_GPIO.h"
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/*---------------------------------------------------fifo????????--------------------------------------------------*/
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/* Clear FIFO and reset to 0 */
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uint8_t CLR_TX_FIFO( CMSDK_SPI_TypeDef* SPIx)
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{
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return (uint8_t)(SPIx->FCR>>8 & 0x1);
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}
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uint8_t CLR_RX_FIFO(CMSDK_SPI_TypeDef* SPIx)
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{
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return (uint8_t)(SPIx->FCR>>1 & 0x1);
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}
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/*FIFO ?????*/
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uint8_t RX_FIFO_LEN(CMSDK_SPI_TypeDef* SPIx)
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{
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return (uint8_t)(((SPIx->FCR & 0x1) == 0x1) ? ((uint8_t)((SPIx->FSR & 0x001f0000)>>16)):0); //??????????FIFO???????
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}
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uint8_t TX_FIFO_LEN(CMSDK_SPI_TypeDef* SPIx)
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{
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return (uint8_t)(((SPIx->FCR & 0x1) == 0x1) ? ((uint8_t)((SPIx->FSR & 0x00001f00)>>8)):0); //??????????FIFO???????
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}
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SPI_BUSY_STATE BUSY_STATE(CMSDK_SPI_TypeDef* SPIx)
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{
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return (SPI_BUSY_STATE)((((SPIx->FSR & 0x10) >> 4)==1) ? ( BUSY ) : ( NOTBUSY )); //??????SPI????
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}
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uint8_t RX_FIFO_FULL(CMSDK_SPI_TypeDef* SPIx)
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{
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return (uint8_t)((((SPIx->FSR & 0x8)>> 3 )==1) ? (1) : (0)) ; //??????FIFO????????
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}
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uint8_t RX_FIFO_EMPTY(CMSDK_SPI_TypeDef* SPIx)
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{
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return (uint8_t)((((SPIx->FSR & 0x4) >> 2)==1) ? (1) : (0) ) ; //??????FIFO???????
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}
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uint8_t TX_FIFO_FULL(CMSDK_SPI_TypeDef* SPIx)
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{
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return (uint8_t)((((SPIx->FSR & 0x2) >> 1)==1) ? (1) : (0)) ; //???????FIFO????????
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}
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uint8_t TX_FIFO_EMPTY(CMSDK_SPI_TypeDef* SPIx)
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{
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return (uint8_t)(((SPIx->FSR & 0x1)==1) ? (1) : (0)) ; //???????FIFO???????
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}
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/*FIFO???/DMA???*/
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uint8_t SPI_FIFO_STATE(CMSDK_SPI_TypeDef* SPIx) //??FIFO????
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{
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return (uint8_t)(SPIx->FCR & 0x1) ;
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}
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uint8_t SPI_FIFO_ENABLE(CMSDK_SPI_TypeDef* SPIx )
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{
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SPIx->FCR |= 0x1;
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return 0;//(uint8_t)(SPIx->FCR & 0x1) ;
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}
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uint8_t SPI_FIFO_DISABLE(CMSDK_SPI_TypeDef* SPIx )
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{
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SPIx->FCR &=~ 0x1;
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return (uint8_t)(SPIx->FCR & 0x1) ;
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}
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uint8_t SPI_FIFODMA_SET(CMSDK_SPI_TypeDef* SPIx ,bool TXDMA_SET ,bool RXDMA_SET)
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{
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if(TXDMA_SET == true)
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SPIx->CTRL2 |= (1<<5);
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else if(TXDMA_SET == false)
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SPIx->CTRL2 &=~ (1<<5);
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if(TXDMA_SET == true)
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SPIx->CTRL2 |= (1<<4);
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else if(TXDMA_SET == false)
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SPIx->CTRL2 &=~ (1<<4);
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return (uint8_t)((SPIx->CTRL2>>4)&0x3);
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}
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/*------------------------------------------------------fifo???????<3F><>--------------------------------------------------*/
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/*----------------------------------------------------------SPI????-------------------------------------------------------*/
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//????????SPI??
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uint8_t READ_SPI_MODE(CMSDK_SPI_TypeDef* SPIx)
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{
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return ((SPIx->CTRL1 & 0x7000) >> 12);
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}
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//NSS??????
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uint8_t SPI_NSS_CHANNEL(CMSDK_SPI_TypeDef* SPIx ,NSS_CHANNEL_SEL NSSx ,FunctionalState ENorDIS)
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{
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if(ENorDIS == ENABLE)
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SPIx->CTRL2 |= ( 1 << NSSx );
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else
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SPIx->CTRL2 &=~ ( 1 << NSSx);
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return (uint8_t)((SPIx->CTRL2 & 0x0f00) >> 8);
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}
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//spi?????????
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uint8_t SPI_Config_init(CMSDK_SPI_TypeDef* SPIx ,
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struct SPI_ModeConfig_Struct SPI_Config,
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struct SPI_FIFO_Struct FIFO_Struct)
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{
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/*1??GPIO ALTER*/
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if(SPIx == CMSDK_SPI1)
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{
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GPIO_AltFunction(GPIO_16 , ALT_FUNC2);
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GPIO_AltFunction(GPIO_17 , ALT_FUNC2);
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GPIO_AltFunction(GPIO_18 , ALT_FUNC2);
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GPIO_AltFunction(GPIO_19 , ALT_FUNC2);
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}
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else if(SPIx == CMSDK_SPI0)
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{
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GPIO_AltFunction(GPIO_8, ALT_FUNC1);
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GPIO_AltFunction(GPIO_9, ALT_FUNC1);
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GPIO_AltFunction(GPIO_10,ALT_FUNC1);
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GPIO_AltFunction(GPIO_11,ALT_FUNC1);
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}
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/*
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2??<3F><>SPI_CTRL1?????
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??1??????????????BAUD_RATE[2:0]
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??2???????????????<3F><> CPOL and CPHA bits
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??3????????? BIDI_EN, BIDI_MODE, UNIDI_MODE bits
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??4??????LSB_SEL<45><4C>??????????
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??5?????????NSS_TOGGLE??NSS_MST_CTRL??NSS_MST_SW bits?????NSS?????? bit11 9 8
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??6?????????MST_SLV_SEL<45><4C>????????????
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*/
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SPIx->CTRL1 = (SPIx->CTRL1&~ 0xffff) | ( SPI_Config.BAUD_FPCLKdivx << 4);
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SPIx->CTRL1 |= (SPI_Config.SPI_MODE << 2);
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SPIx->CTRL1 |= (SPI_Config.SPI_TRANS_MODE << 12 );
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SPIx->CTRL1 &=~ (0x1 << 7); //???????????
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SPIx->CTRL1 &=~ (0x1 << 8); //???????????
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SPIx->CTRL1 &=~ (1 << 11);
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SPIx->CTRL1 |= (1 << 11) ; // ??????????NSS
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if(SPI_Config.MS_SEL == MASTER)
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{
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SPIx->CTRL1 |= (1<<1);
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}
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else
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{
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SPIx->CTRL1 &=~ (1<<1);
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}
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/*
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3??<3F><>SPI_CTRL2?????
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??1??????CHAR_LEN[3:0]<5D><>???????????????
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??2?????NSS???? NSS0_EN, NSS1_EN, NSS2_EN
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??3????????????????????RX????????? SAMP_PHASE(1:0)<29><>
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??4?????????C2T_DELAY??T2C_DELAY<41><59>???????????<3F><>?????????????C2T/T2C???
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??5?????????TXDMA_EN??RXDMA_EN<45><4E>???????FIFO????TX/RX DMA??
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*/
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SPIx->CTRL2 = (SPIx->CTRL2&~ 0xffff);
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if(SPI_Config.CHAR_LEN < 4)
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{
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}
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else if((SPI_Config.CHAR_LEN >= 4) && (SPI_Config.CHAR_LEN < 17))
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{
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SPIx->CTRL2 |= (SPI_Config.CHAR_LEN -1);
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}
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else
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{
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}
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SPI_NSS_CHANNEL(SPIx ,SPI_Config.NSSx ,ENABLE);
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//rx???????<3F><>?? ??????????????<3F><>??????normal
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//C2T_DELAY ,????????????<3F><>
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//T2C_DELAY, ????????????<3F><>
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if(SPI_Config.MS_SEL == MASTER)
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{
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SPIx->CTRL2 |= (SPI_Config.SAMP_PHASE << 6);
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//T2C ??Transmit-end-to-chip-inactive ????????????1T SCK
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//C2T ??Chip-select-active-to-transmit-start ????? ???1T SCK ,????????????????????
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}
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/*
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4??<3F><>FIFO ?????
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??1??????TX_FIFO_TH??RX_FIFO_TH?????<3F><>?????????
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??2?????????TX_FIFO_CLR??RX_FIFO_CLR<4C><52>???TX/RX FIFO
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??3?????????fif_en<65><6E>???????FIFO??
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*/
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SPIx->FCR |= (FIFO_Struct.TX_FIFO_TH << 9 );
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SPIx->FCR |= (FIFO_Struct.RX_FIFO_TH << 2 );
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CLR_TX_FIFO(SPIx) ;
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CLR_RX_FIFO(SPIx) ;
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if(FIFO_Struct.FIFO_ENABLE_SET == true)
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SPI_FIFO_ENABLE(SPIx);
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//SPI_FIFODMA_SET(SPIx ,FIFO_Struct.TXDMA_SET ,FIFO_Struct.RXDMA_SET);
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return 0;
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}
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/*---------------------------------------------SPI????????-------------------------------------------------*/
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uint8_t SPI_START(CMSDK_SPI_TypeDef* SPIx )
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{
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SPIx->CTRL1 |= (1);
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return (uint8_t)(SPIx->CTRL1 & 0x1);
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}
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uint8_t SPI_STOP(CMSDK_SPI_TypeDef* SPIx)
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{
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if((READ_SPI_MODE(SPIx)==(L2_UniDirect_R & 0x7)) || (READ_SPI_MODE(SPIx)==(L1_BiDirect_R & 0x7)))
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{
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if(SPI_FIFO_STATE(SPIx) == 1)
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{
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//?? RX??FIFO ??? FIFO????? 0
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while((RX_FIFO_LEN(SPIx) != 0) || (BUSY_STATE(SPIx) == BUSY))
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{
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//save_data = READ_SPI_RCVBuff(SPIx);
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}
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SPIx->CTRL1 &=~ (1);
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}
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else if(SPI_FIFO_STATE(SPIx) == 0)
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{
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while(BUSY_STATE(SPIx) == BUSY);
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SPIx->CTRL1 &=~ (1);
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}
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}
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else
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{
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if(SPI_FIFO_STATE(SPIx) == 1)
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{
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while((TX_FIFO_LEN(SPIx)!= 0) || (BUSY_STATE(SPIx) == BUSY));
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SPIx->CTRL1 &=~ (1);
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//?? RX??FIFO ??? FIFO????? 0
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while(RX_FIFO_LEN(SPIx) != 0)
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{
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uint16_t save_data = READ_SPI_RCVBuff(SPIx);
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}
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}
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else if(SPI_FIFO_STATE(SPIx) == 0)
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{
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while(BUSY_STATE(SPIx) == BUSY);
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SPIx->CTRL1 &=~ (1);
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}
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}
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return (uint8_t)(SPIx->CTRL1*0x1);
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}
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/*-----------------------------------------?? / <20><> SPI BUFFER??????-------------------------------------------------*/
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//????????????? ???16bits
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uint16_t READ_SPI_RCVBuff(CMSDK_SPI_TypeDef* SPIx)
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{
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return (uint16_t)(SPIx->RBR & 0xffff);
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}
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//<2F><>????
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void WRITE_SPI_THRBuff(CMSDK_SPI_TypeDef* SPIx,uint8_t data)
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{
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SPIx->THR = data;
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while(BUSY_STATE(SPIx) == BUSY);
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}
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/*------------------------------------------------------SPI?<3F><>?------------------------------------------------------*/
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uint8_t SPI_INT_SET(IRQn_Type IRQn, bool SPI_INT_ENABLE, uint8_t SPI_INT_BIT_SET)
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{
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NVIC_DisableIRQ(IRQn);
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NVIC_ClearPendingIRQ(IRQn);
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if(IRQn == SPI0_IRQn)
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{
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CMSDK_SPI0->IER = ((CMSDK_SPI0->IER &~ (0xff)) | SPI_INT_BIT_SET);
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}
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else if(IRQn == SPI1_IRQn)
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{
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CMSDK_SPI1->IER = ((CMSDK_SPI0->IER &~ (0xff)) | SPI_INT_BIT_SET);
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}
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if(SPI_INT_ENABLE == true)
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{
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NVIC_EnableIRQ(IRQn);
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}
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else
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{
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NVIC_DisableIRQ(IRQn);
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}
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return 0;
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}
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//?<3F><>????????
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/*
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?<3F><>????????????
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1??????????? ???? ?<3F><>?????????????????
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2??????????? ??? ?<3F><>??????????
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3?????????<3F><>??
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4????????????? ?<3F><>?
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5?????????????? ?<3F><>?
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*/
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void SPI1_Handler(void)
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{
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NVIC_ClearPendingIRQ(SPI1_IRQn);
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uint8_t read_fifo=0;
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if((CMSDK_SPI1->INTSTATUS & 0x10 )== UNDERRUN_INT) //????-???????????????????????
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{
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CMSDK_SPI1->INTCLEAR |= (1<<4); //????<3F><>?
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}
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if((CMSDK_SPI1->INTSTATUS & 0x8) ==OVERRUN_INT)
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{
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CMSDK_SPI1->INTCLEAR |= (1<<3);
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}
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if((CMSDK_SPI1->INTSTATUS& 0x4) ==CMPL_INT)
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{
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CMSDK_SPI1->INTCLEAR |= (1<<2);
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}
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if((CMSDK_SPI1->INTSTATUS &0x2) ==TXE_INT)
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{
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}
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if((CMSDK_SPI1->INTSTATUS & 1)== RXNE_INT)
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{
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while(!RX_FIFO_EMPTY(CMSDK_SPI1))
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{
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read_fifo = READ_SPI_RCVBuff(CMSDK_SPI1);
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}
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}
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}
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void SPI0_Handler(void)
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{
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NVIC_ClearPendingIRQ(SPI0_IRQn);
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uint8_t read_fifo=0;
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if((CMSDK_SPI0->INTSTATUS & 0x10 )== UNDERRUN_INT) //????-???????????????????????
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{
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CMSDK_SPI0->INTCLEAR |= (1<<4); //????<3F><>?
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}
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if((CMSDK_SPI0->INTSTATUS & 0x8) ==OVERRUN_INT)
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{
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CMSDK_SPI0->INTCLEAR |= (1<<3);
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}
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if((CMSDK_SPI0->INTSTATUS& 0x4) ==CMPL_INT)
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{
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CMSDK_SPI0->INTCLEAR |= (1<<2);
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}
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if((CMSDK_SPI0->INTSTATUS &0x2) ==TXE_INT)
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{
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}
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if((CMSDK_SPI0->INTSTATUS & 1)== RXNE_INT)
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{
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while(!RX_FIFO_EMPTY(CMSDK_SPI0))
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{
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read_fifo = READ_SPI_RCVBuff(CMSDK_SPI0);
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}
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}
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}
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