167 lines
5.0 KiB
C
167 lines
5.0 KiB
C
/*
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*Copyright ,2023 , NANOCHAP
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*File name: ENS1_PWM.C
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*Author:
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*Version: V1.0
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*Date: 2023-11-
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*Description:
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*Function List:
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History:
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1.V1.0
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Date:
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Author:
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Modification: 初版
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*/
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#include "ens1_pwm.h"
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//PWMx 选择PWM输出通道
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//edge_mode pwm边沿模式 默认单边
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//pulse_duty 占空比 0-100 （有些偏差）
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//freq_HZ 频率 单位 HZ
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//pwmEnable 使能输出
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void PWM_init(ENS1_PWM_CHANNEL PWMx , PWM_ParaStructrue* PWM_Para , bool pwmEnable)
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{
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if(PWMx > 6 || PWMx < 1)
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PWMx = IO16_PWM1;
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int pwmsel = PWMx-2;
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if(pwmsel<0)
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pwmsel = 0;
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if(PWM_Para->pwm_Duty_cycle>100)
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PWM_Para->pwm_Duty_cycle=100;
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//IO复用
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CMSDK_GPIO->ALTFH |= (0x01 << ((PWMx-1)*2));
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uint32_t pulse_width = (uint32_t)((uint8_t)APB_Clock_Freq / ((PRESCALE_PWM+1) * (PWM_Para->pwm_freq)));
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CMSDK_PWM->MR0 = pulse_width;
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/*模式： 1 单边模式 2 双边正脉冲 3 双边负脉冲*/
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if(PWM_Para->mode == pwm_single_mode)
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{
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//pwm通道1-6的某一个通道的计数值填充
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*(unsigned long*)(CMSDK_PWM_BASE + 0x018 + 0x4*(PWMx))=(uint32_t)(PWM_Para->pwm_Duty_cycle*CMSDK_PWM->MR0/100);
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}
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else if(PWM_Para->mode == pwm_double_positive_mode)
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{
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//pwm通道1-6的某一个通道的计数值填充
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CMSDK_PWM->PCR |= (1<<pwmsel) ;
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if(PWMx < 6 || PWMx > 1) //仅允许使用2-6
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{
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*(unsigned long*)(CMSDK_PWM_BASE + 0x018 + 0x4*(PWMx-1))=(uint32_t)(0);
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*(unsigned long*)(CMSDK_PWM_BASE + 0x018 + 0x4*(PWMx))=(uint32_t)(PWM_Para->pwm_Duty_cycle*pulse_width/100);
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}
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}
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else
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{
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CMSDK_PWM->PCR |= (1<<pwmsel) ;
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if(PWMx < 6 || PWMx >1) //仅允许使用2-6
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{
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*(unsigned long*)(CMSDK_PWM_BASE + 0x018 + 0x4*(PWMx-1))=(uint32_t)(pulse_width);
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*(unsigned long*)(CMSDK_PWM_BASE + 0x018 + 0x4*(PWMx))=(uint32_t)((100-PWM_Para->pwm_Duty_cycle)*pulse_width/100);
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}
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}
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CMSDK_PWM->PR = PRESCALE_PWM;//Prescale
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CMSDK_PWM->LER |= (1)|(1<<PWMx); //加载使能
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CMSDK_PWM->TCR |= (1<<1); //计数使能
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CMSDK_PWM->MCR |= (1<<1) ; //中断不使能和复位使能| ((PWMx*3+1)<<1)
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if(pwmEnable == true)
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CMSDK_PWM->PCR |= (0x01 << (PWMx+4));
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else
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CMSDK_PWM->PCR &=~ (0x01 << (PWMx+4));
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}
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void PWM_SetFreq(ENS1_PWM_CHANNEL PWMx , PWM_ParaStructrue * PWM_Para )
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{
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CMSDK_PWM->MR0 = (uint32_t)((uint8_t)APB_Clock_Freq/ ((PRESCALE_PWM+1) * (PWM_Para->pwm_freq)));
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}
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void PWM_SetDutyCycle_SingleMode(ENS1_PWM_CHANNEL PWMx ,uint8_t DutyCycle) //设置占空比
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{
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PWM_OutputDisable(PWMx);
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CMSDK_PWM->LER &=~ (1<<PWMx);
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*(unsigned long*)(CMSDK_PWM_BASE + 0x018 + 0x4*(PWMx))=(uint32_t)(DutyCycle* CMSDK_PWM->MR0/100);
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CMSDK_PWM->LER |= (1<<PWMx);
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PWM_OutputEnable(PWMx);
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}
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void PWM_SetDutyCycle_DoublePositiveMode(ENS1_PWM_CHANNEL PWMx ,uint8_t DutyCycle)
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{
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if(PWMx < 2)
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{
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return ;
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}
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else
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{
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PWM_OutputDisable(PWMx);
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CMSDK_PWM->LER &=~ (1<<PWMx);
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*(unsigned long*)(CMSDK_PWM_BASE + 0x018 + 0x4*(PWMx))=(uint32_t)(DutyCycle*CMSDK_PWM->MR0/100);
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CMSDK_PWM->LER |= (1<<PWMx);
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PWM_OutputEnable(PWMx);
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}
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}
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void PWM_SetDutyCycle_DoubleNegtiveMode(ENS1_PWM_CHANNEL PWMx ,uint8_t DutyCycle)
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{
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if(PWMx < 2)
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{
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return ;
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}
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else
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{
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PWM_OutputDisable(PWMx);
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CMSDK_PWM->LER &=~ (1<<PWMx);
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*(unsigned long*)(CMSDK_PWM_BASE + 0x018 + 0x4*(PWMx))=(uint32_t)((100-DutyCycle)*CMSDK_PWM->MR0/100);
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CMSDK_PWM->LER |= (1<<PWMx);
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PWM_OutputEnable(PWMx);
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}
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}
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void PWM_OutputDisable(ENS1_PWM_CHANNEL PWMx)
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{
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CMSDK_PWM->PCR &=~ (0x01 << (PWMx+4));
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}
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void PWM_OutputEnable(ENS1_PWM_CHANNEL PWMx)
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{
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CMSDK_PWM->PCR |= (0x01 << (PWMx+4));
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}
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uint32_t pwm_irq_occurred_mr[7];
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void PWM_Handler(void) {
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//MR0 status interrupt
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if((CMSDK_PWM->INTSTATUS & CMSDK_PWM_MR0_INT_STS_Msk)==CMSDK_PWM_MR0_INT_STS_Msk) {
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CMSDK_PWM->INTCLEAR = CMSDK_PWM_MR0_INT_STS_Msk;//Clear Interrupt
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pwm_irq_occurred_mr[0]++;
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}
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//MR1 status interrupt
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if((CMSDK_PWM->INTSTATUS & CMSDK_PWM_MR1_INT_STS_Msk)==CMSDK_PWM_MR1_INT_STS_Msk) {
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CMSDK_PWM->INTCLEAR = CMSDK_PWM_MR1_INT_STS_Msk;//Clear Interrupt
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pwm_irq_occurred_mr[1]++;
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}
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//MR2 status interrupt
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if((CMSDK_PWM->INTSTATUS & CMSDK_PWM_MR2_INT_STS_Msk)==CMSDK_PWM_MR2_INT_STS_Msk) {
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CMSDK_PWM->INTCLEAR = CMSDK_PWM_MR2_INT_STS_Msk;//Clear Interrupt
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pwm_irq_occurred_mr[2]++;
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}
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//MR3 status interrupt
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if((CMSDK_PWM->INTSTATUS & CMSDK_PWM_MR3_INT_STS_Msk)==CMSDK_PWM_MR3_INT_STS_Msk) {
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CMSDK_PWM->INTCLEAR = CMSDK_PWM_MR3_INT_STS_Msk;//Clear Interrupt
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pwm_irq_occurred_mr[3]++;
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}
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//MR4 status interrupt
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if((CMSDK_PWM->INTSTATUS & CMSDK_PWM_MR4_INT_STS_Msk)==CMSDK_PWM_MR4_INT_STS_Msk) {
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CMSDK_PWM->INTCLEAR = CMSDK_PWM_MR4_INT_STS_Msk;//Clear Interrupt
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pwm_irq_occurred_mr[4]++;
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}
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//MR5 status interrupt
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if((CMSDK_PWM->INTSTATUS & CMSDK_PWM_MR5_INT_STS_Msk)==CMSDK_PWM_MR5_INT_STS_Msk) {
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CMSDK_PWM->INTCLEAR = CMSDK_PWM_MR5_INT_STS_Msk;//Clear Interrupt
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pwm_irq_occurred_mr[5]++;
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}
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//MR6 status interrupt
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if((CMSDK_PWM->INTSTATUS & CMSDK_PWM_MR6_INT_STS_Msk)==CMSDK_PWM_MR6_INT_STS_Msk) {
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CMSDK_PWM->INTCLEAR = CMSDK_PWM_MR6_INT_STS_Msk;//Clear Interrupt
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pwm_irq_occurred_mr[6]++;
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}
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}
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